1. Field of the Invention
The present invention relates in general to a color television receiver having an automatic white balance adjusting circuit which has video blanking during a predetermined period after a power switch of a television receiver is turned on which prevents an unstable picture due to variations of the automatic white balance adjusting circuit during turn-on.
2. Description of the Prior Art
FIG. 1 is a block circuit diagram showing an example of a prior art television receiver wherein an antenna 1 supplies an input to a tuner circuit 2. A video detector circuit 3 receives an amplified intermediate frequency signal from the tuner 2 and supplies a composite video signal S.sub.V to a luminance signal/chrominance signal separator circuit 4.
A luminance signal Y from the separator circuit 4 is supplied through a luminance amplifier 5 to a matrix circuit 6. Also, a chrominance signal C from the separator circuit 4 is supplied to a color demodulator circuit 7. The color demodulator circuit 7 produces a red color difference signal R-Y and a blue color difference signal B-Y both of which are fed to the matrix circuit 6.
The matrix circuit 6 performs the matrix resolution of the luminance signal Y and the color difference signals R-Y and B-Y and produces red, green and blue primary color signals R, G and B at its output. The red primary color signal R is supplied through an adder 8R to an amplifier 9R and through a level shifter circuit 10R to the base of an npn-type transistor 12R which forms a video output circuit 11R.
The emitter of the transistor 12R is grounded through a resistor 13R and the collector of transistor 12R is connected through a resistor 14R to a power supply terminal +B. The collector of the transistor 12R is also connected to the base of a pnp-type transistor 15R. The emitter of the transistor 15R is connected to a cathode K.sub.R that provides the red color gun of a color picture tube 16 and the collector of transistor 15R is grounded through a transistor 17R.
It is also to be realized that the green primary color signal G and the blue primary color signal B supplied from the matrix circuit 6 are also supplied to adders 8G and 8B, respectively. Although not illustrated, circuit elements are mounted between the adders 8G and 8B which correspond to those in the red primary color signal and are respectively connected to the green cathode K.sub.G and the blue cathode K.sub.B of the tube 16. Since these circuits are identical to the red channel, they are not shown in detail in FIG. 1.
The luminance signal Y obtained from the separator circuit 4 is supplied to a sync separator circuit 18. A horizontal sync signal P.sub.H and a vertical sync signal P.sub.V obtained from the sync separator circuit 18 are supplied to a horizontal deflection circuit 19H and a vertical deflection circuit 19V, respectively. The respective deflection signals from horizontal deflection circuit 19H and the vertical deflection circuit 19V are fed to a deflection coil 20 of the picture tube 16.
In the circuit arrangement described above, the cathodes K.sub.R, K.sub.G, and K.sub.B of the picture tube 16 are driven by the red, green and blue primary colors R, G and B and a color picture will be displayed on the video screen of the picture tube 16.
A blanking pulse generator circuit 21 for generating a horizontal blanking pulse and also a vertical blanking pulse of 5-6 horizontal periods receives inputs as shown. The blanking pulse generator 21 is supplied with a pulse signal P.sub.H ' of the horizontal period from the horizontal deflection circuit 19H and also a signal P.sub.V ' of the vertical period from the vertical deflection circuit 19V and npn-type transistor 22R receives on its base a signal P.sub.BLA from the blanking pulse generator 21. Thus, during the period of the blanking pulse P.sub.BLK, the transistor 22R will be turned on so that the base of the transistor 12R to which it is connected will be grounded to cause video blanking and, thus, a flyback line is prevented from appearing on the video screen. Although not illustrated such video blanking is accomplished in the same way with respect to the green primary color signal path and the blue primary color signal path.
A pulse generator circuit 23 generates a reference pulse P.sub.REF that is used to adjust the white balance. The pulse generator circuit 23 is supplied with signals P.sub.H ' and P.sub.V ' from the deflection circuits 19H and 19D. The reference pulse signal P.sub.REF is formed such that its first half during one horizontal period is composed of a signal P.sub.1 having a luminance level of 60 IRE which is used to adjust the beam current of the white level and its second half is composed of a signal P.sub.2 having a luminance level in a range from 15-20 IRE which is used to adjust the beam current of the black level. The reference pulse P.sub.REF is supplied to a reference signal insertion circuit 24 and from its output to adders 8R, 8G and 8B and the reference pulse P.sub.REF is inserted into a predetermined horizontal period of each vertical blanking period of the primary color signals R, G and B as illustrated in FIG. 4A. In FIG. 4A, reference letter H.sub.S designates a horizontal sync signal and FIG. 4B shows the blanking pulse P.sub.BLK.
The connection point between the collector of the transistor 15R and the resistor 17R is connected through a switching circuit 25R to one input terminal of an operational amplifier 26R which comprises a comparator. A gate pulse generator circuit 27 receives the signals P.sub.H ' and P.sub.V ' deflection circuits 19H and 19V. The gate pulse generator 27 generates a gate pulse P.sub.G2 illustrated in FIG. 4D which corresponds to the signal P.sub.2 position of the reference pulse P.sub.REF. The gate pulse P.sub.G2 is supplied to the switching circuit 25R to turn on the switching circuit 25R only during the period of the gate pulse P.sub.G2. A capacitor illustrated is connected between the output terminal of switching circuit 25R and ground. This capacitor is charged during the pulse period of the gate pulse P.sub.G2 and the potential of the capacitor will be held during the period in which the switching circuit 25R is turned off. This causes the deflected voltage E.sub.B corresponding to a cathode beam current I.sub.R when the signal P.sub.2 is supplied to the cathode K.sub.R to be supplied to one input terminal of the operational amplifier 26R where it is compared with a reference voltage E.sub.R2 which is supplied to the other input terminal of the amplifier 26R. The error signal produced at the output terminal of the operational amplifier 26R is supplied to the level shifter circuit 10R as a control signal such that a DC level is controlled such that the cathode current I.sub.R has a predetermined black level when the signal P.sub.2 occurs which is determined by the reference voltage E.sub.R2 in consideration of the white balance.
The connection point between the collector of the transistor 15R and the resistor 17R is also connected through a switching circuit 28R to one input terminal of an operational amplifier 29R which forms a comparator. The gate pulse generator circuit 27 also generates a gate pulse P.sub.G1 illustrated in FIG. 4C which corresponds to the signal P.sub.1 portion of the above-mentioned reference pulse P.sub.REF. The gate pulse P.sub.G1 is supplied to the switching circuit 28R so that the switching circuit 28R will be turned on only during the pulse period of the gate pulse P.sub.G1. A capacitor is connected between the output terminal of the switching circuit 28R and ground as illustrated. This capacitor is charged during the pulse period of the gate pulse P.sub.G1 and the voltage will be held during the period in which the switching circuit 28R is turned off. Accordingly, a detected voltage E.sub.W corresponding to the cathode current I.sub.R when the signal P.sub.1 is supplied to the cathode K.sub.R is obtained. The voltage E.sub.W is supplied to one input terminal of the operational amplifier 29R and a reference voltage E.sub.R1 is supplied to the other input terminal of the operational amplifier 29R. The error signal produced at the output terminal of the operational amplifier 29R is supplied to the amplifier 9R as the control signal so that the gain of the amplifier 9R is controlled such that the cathode current I.sub.R during the signal P.sub.1 will have a predetermined white level that is determined by the reference voltage E.sub.R1 in consideration of the white balance.
Although not illustrated, the control of the cathode beam currents for the green and blue primary color signal systems is accomplished in the same manner as that illustrated for the cathode current for the red electron gun. Thus, in the prior art system of FIG. 1, the white balance will be automatically adjusted.
A white balance adjusting apparatus has been disclosed in published document, Japanese Patent Publication (KOKAI) No. 55-67286 which discloses a system wherein when the power switch of the television receiver is turned on, an automatic control loop is cutoff and a white balance adjusting voltage is supplied from a predetermined bias source and after a predetermined time since the power switch of the television receiver has been turned on, the automatic control loop is operated. However, in this system described in Japanese Patent Publication No. 55-67286 since the picture is already displayed on the picture screen of the television receiver before the AWB loop is stabilized, and when the automatic control loop is changed from an inoperable condition to the operable condition, a transit condition on the picture screen is inevitable so that the display picture becomes unstable similar to the prior art described example above.